443 search results - page 41 / 89 » An interconnection architecture for micropayment systems |
DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
—Static and dynamic variations, which have negative impact on the reliability of microelectronic systems, increase with smaller CMOS technology. Thus, further downscaling is only...
112
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WOB
2004
15 years 1 months ago
2004
ABSTRACT. Reconfigurable systolic arrays can be adapted to efficiently resolve a wide spectrum of computational problems; parallelism is naturally explored in systolic arrays and r...
115
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FDL
2003
IEEE
15 years 5 months ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
EUROPAR
2001
Springer
15 years 4 months ago
2001
Springer
Abstract. In this paper, we address two key trends in the synthesis of implementations for embedded multiprocessors — (1) the increasing importance of managing interprocessor com...
112
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ECRTS
2004
IEEE
15 years 3 months ago
2004
IEEE
We present an approach to partitioning and mapping for multicluster embedded systems consisting of time-triggered and eventtriggered clusters, interconnected via gateways. We have...