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DATE
2009
IEEE
122views Hardware» more  DATE 2009»
16 years 7 days ago
Analysis and optimization of NBTI induced clock skew in gated clock trees
NBTI (Negative Bias Temperature Instability) has emerged as the dominant PMOS device failure mechanism for sub100nm VLSI designs. There is little research to quantify its impact o...
Ashutosh Chakraborty, Gokul Ganesan, Anand Rajaram...
DATE
2009
IEEE
115views Hardware» more  DATE 2009»
16 years 7 days ago
Automated data analysis solutions to silicon debug
Since pre-silicon functional verification is insufficient to detect all design errors, re-spins are often needed due to malfunctions that escape into the silicon. This paper pre...
Yu-Shen Yang, Nicola Nicolici, Andreas G. Veneris
FMICS
2009
Springer
16 years 1 days ago
Formal Analysis of Non-determinism in Verilog Cell Library Simulation Models
Cell libraries often contain a simulation model in a system design language, such as Verilog. These languages usually involve nondeterminism, which in turn, poses a challenge to th...
Matthias Raffelsieper, Mohammad Reza Mousavi, Jan-...
ISVC
2009
Springer
16 years 1 days ago
Level Set Gait Analysis for Synthesis and Reconstruction
We describe a new technique to extract the boundary of a walking subject, with ability to predict movement in missing frames. This paper uses a level sets representation of the tra...
Muayed S. Al-Huseiny, Sasan Mahmoodi, Mark S. Nixo...
ICSEA
2008
IEEE
15 years 12 months ago
Analysis of a Distributed e-Voting System Architecture against Quality of Service Requirements
In this paper we propose that formal modelling techniques are necessary in establishing the trustworthiness of e-voting systems and the software within. We illustrate how a distri...
J. Paul Gibson, Eric Lallet, Jean-Luc Raffy