This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
Truly generic and reusable intelligent tutoring software architectures have remained elusive. As part of our effort to develop tutoring systems for simulations of ill-defined doma...
Dave Gomboc, Mark G. Core, H. Chad Lane, Ashish Ka...
Voice/Video over IP (VoIP) systems to date have been either highly centralized or dependent on the IP multicast in nature. Global Multimedia Collaboration System is a scalable, in...
Wenjun Wu, Geoffrey Fox, Hasan Bulut, Ahmet Uyar, ...
Most approaches in reverse engineering literature generate a single view of a software system that restricts the scope of the reconstruction process. We propose an orchestrated se...