205 search results - page 6 / 41 » Coordinated management of power usage and runtime performanc... |
NOCS
2010
IEEE
14 years 10 months ago
2010
IEEE
—Three-dimensional network-on-chip (3D NoC), the combination of NoC and die-stacking 3D IC technology, is motivated to achieve lower latency, lower power consumption, and higher ...
113
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ISCA
2009
IEEE
15 years 6 months ago
2009
IEEE
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
101
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HPCA
2001
IEEE
16 years 1 days ago
2001
IEEE
With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and po...
143
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VEE
2012
ACM
13 years 7 months ago
2012
ACM
With the shift to many-core chip multiprocessors (CMPs), a critical issue is how to effectively coordinate and manage the execution of applications and hardware resources to overc...
IISWC
2006
IEEE
15 years 5 months ago
2006
IEEE
Abstract— This paper presents our approach for applicationaware power management. We combine continuous monitoring of critical workload indicators, online power and performance m...