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» Copper Electrodeposition for 3D Integration
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CORR
2008
Springer
148views Education» more  CORR 2008»
13 years 10 months ago
Copper Electrodeposition for 3D Integration
Abstract-Two dimensional (2D) integration has been the traditional approach for IC integration. Increasing demands for providing electronic devices with superior performance and fu...
Rozalia Beica, Charles Sharbono, Tom Ritzdorf
CORR
2008
Springer
63views Education» more  CORR 2008»
13 years 10 months ago
Evaluation of the thermal and hydraulic performances of a very thin sintered copper flat heat pipe for 3D microsystem packages
The reported research work presents numerical studies validated by experimental results of a flat micro heat pipe with sintered copper wick structure. The objectives of this resea...
Slaska Tzanova, Lora Kamenova, Yvan Avenas, Christ...
DATE
2010
IEEE
156views Hardware» more  DATE 2010»
14 years 3 months ago
3D-integration of silicon devices: A key technology for sophisticated products
—3D integration is a key solution to the predicted performance increase of future electronic systems. It offers extreme miniaturization and fabrication of More than Moore product...
Armin Klumpp, Peter Ramm, R. Wieland
DAC
2010
ACM
14 years 1 months ago
TSV stress aware timing analysis with applications to 3D-IC layout optimization
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee,...