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CHES
2005
Springer
170views Cryptology» more  CHES 2005»
15 years 11 months ago
Design of Testable Random Bit Generators
Abstract. In this paper, the evaluation of random bit generators for security applications is discussed and the concept of stateless generator is introduced. It is shown how, for t...
Marco Bucci, Raimondo Luzzi
CHES
2005
Springer
85views Cryptology» more  CHES 2005»
15 years 11 months ago
Secure Data Management in Trusted Computing
Abstract. In this paper we identify shortcomings of the TCG specification related to the availability of sealed data during software and hardware life cycles, i.e., software updat...
Ulrich Kühn, Klaus Kursawe, Stefan Lucks, Ahm...
CHES
2005
Springer
146views Cryptology» more  CHES 2005»
15 years 11 months ago
AES on FPGA from the Fastest to the Smallest
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...
Tim Good, Mohammed Benaissa
CHES
2005
Springer
111views Cryptology» more  CHES 2005»
15 years 11 months ago
Hardware Acceleration of the Tate Pairing in Characteristic Three
Although identity based cryptography offers many functional advantages over conventional public key alternatives, the computational costs are significantly greater. The core comp...
Philipp Grabher, Dan Page
CHES
2005
Springer
123views Cryptology» more  CHES 2005»
15 years 11 months ago
Improved Higher-Order Side-Channel Attacks with FPGA Experiments
We demonstrate that masking a block cipher implementation does not sufficiently improve its security against side-channel attacks. Under exactly the same hypotheses as in a Differ...
Eric Peeters, François-Xavier Standaert, Ni...