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DAC
2000
ACM
16 years 6 months ago
MINFLOTRANSIT: min-cost flow based transistor sizing tool
This paper presents MINFLOTRANSIT, a new transistor sizing tool for fast sizing of combinational circuits with minimal cost. MINFLOTRANSIT is an iterative relaxation based tool th...
Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K...
DAC
2006
ACM
16 years 6 months ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Tao Luo, David Newmark, David Z. Pan
WWW
2006
ACM
16 years 6 months ago
WAP5: black-box performance debugging for wide-area systems
Wide-area distributed applications are challenging to debug, optimize, and maintain. We present Wide-Area Project 5 (WAP5), which aims to make these tasks easier by exposing the c...
Patrick Reynolds, Janet L. Wiener, Jeffrey C. Mogu...
VLSID
2005
IEEE
82views VLSI» more  VLSID 2005»
16 years 5 months ago
Dual-Edge Triggered Static Pulsed Flip-Flops
Two Simple structures of low-power Dual-edge triggered Static Pulsed Flip-Flops (DSPFF) are presented in this paper. They are composed of a dualedge pulse generator and a static f...
Aliakbar Ghadiri, Hamid Mahmoodi-Meimand
STOC
2001
ACM
151views Algorithms» more  STOC 2001»
16 years 5 months ago
Buffer overflow management in QoS switches
Abstract. We consider two types of buffering policies that are used in network switches supporting Quality of Service (QoS). In the FIFO type, packets must be transmitted in the or...
Alexander Kesselman, Zvi Lotker, Yishay Mansour, B...