473 search results - page 23 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
108
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ASPDAC
2001
ACM
15 years 3 months ago
2001
ACM
Asynchronous, self-timed, logic is often eschewed in digital design because of its ad-hoc methodologies and lack of available design tools. This paper describes a complete High Le...
102
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DATE
1999
IEEE
15 years 4 months ago
1999
IEEE
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
IH
1998
Springer
15 years 4 months ago
1998
Springer
Advanced CAD tools and high-density VLSI technologies have combined to create a new market for reusable digital designs. The economic viability of the new core-based design paradig...
ICAC
2005
IEEE
15 years 5 months ago
2005
IEEE
This paper proposes autonomic or organic computing principles to be applied to hardware design methods for future SoC solutions. Incorporating self-calibration, fault tolerance or...