473 search results - page 65 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
117
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INTEGRATION
2006
14 years 11 months ago
2006
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
ICCAD
2002
IEEE
15 years 8 months ago
2002
IEEE
As the scale of system integration continues to grow, the on-chip communication becomes the ultimate bottleneck of system performance and the primary determinant of system archite...
102
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ISLPED
2009
ACM
15 years 6 months ago
2009
ACM
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...
102
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ISSS
1999
IEEE
15 years 4 months ago
1999
IEEE
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
100
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DAC
2004
ACM
16 years 23 days ago
2004
ACM
We describe a new extraction tool, EMX (Electro-Magnetic eXtractor), for the analysis of RF, analog and high-speed digital circuits. EMX is a fast full-wave field solver. It incor...