279 search results - page 17 / 56 » Design Methodology for Pipelined Heterogeneous Multiprocesso... |
109
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ISVLSI
2002
IEEE
15 years 4 months ago
2002
IEEE
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
- In this paper, we present a design methodology for automatic platform generation of future heterogeneous systems where communication happens via the Network-onChip (NoC) approach...
107
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CODES
2006
IEEE
15 years 5 months ago
2006
IEEE
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...
103
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DAC
2007
ACM
16 years 21 days ago
2007
ACM
Emerging single-chip heterogeneous multiprocessors feature hundreds of design elements contending for shared resources, making it difficult to isolate performance impacts of indiv...
80
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DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs)...