4394 search results - page 244 / 879 » Designing agent chips |
141
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DATE
2007
IEEE
16 years 10 days ago
2007
IEEE
Multiple asynchronous clock domains have been increasingly employed in System-on-Chip (SoC) designs for different I/O interfaces. Functional validation is one of the most expensiv...
137
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MICRO
2006
IEEE
16 years 15 hour ago
2006
IEEE
Although processor design verification consumes ever-increasing resources, many design defects still slip into production silicon. In a few cases, such bugs have caused expensive...
151
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SBCCI
2003
ACM
15 years 11 months ago
2003
ACM
There has been a lot of discussion, and a lot of confusion, about the various existing and new design languages recently. SystemC, SystemVerilog, Verilog2005, e, Vera, PSL/Sugar, ...
220
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DSD
2008
IEEE
15 years 7 months ago
2008
IEEE
Platform-based design represents the most widely used approach to design System-On-Chip (SOC) applications. In this context, the Design Space Exploration (DSE) phase consists of o...
164
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JIRS
2007
15 years 5 months ago
2007
A detailed step-by-step approach is presented to optimize, standardize, and automate the process of unmanned vehicle controller design, evaluation, validation and verification, fol...