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» Disk Built-in Caches: Evaluation on System Performance
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CASES
2007
ACM
15 years 3 months ago
A low power front-end for embedded processors using a block-aware instruction set
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Ahmad Zmily, Christos Kozyrakis
USENIX
1994
15 years 1 months ago
Reducing File System Latency using a Predictive Approach
Despite impressive advances in file system throughput resulting from technologies such as high-bandwidth networks and disk arrays, file system latency has not improved and in many...
Jim Griffioen, Randy Appleton
STORAGESS
2006
ACM
15 years 5 months ago
Scalable security for large, high performance storage systems
New designs for petabyte-scale storage systems are now capable of transferring hundreds of gigabytes of data per second, but lack strong security. We propose a scalable and effici...
Andrew W. Leung, Ethan L. Miller
MICRO
1995
IEEE
108views Hardware» more  MICRO 1995»
15 years 3 months ago
SPAID: software prefetching in pointer- and call-intensive environments
Software prefetching, typically in the context of numericor loop-intensive benchmarks, has been proposed as one remedy for the performance bottleneck imposed on computer systems b...
Mikko H. Lipasti, William J. Schmidt, Steven R. Ku...
RTSS
2003
IEEE
15 years 5 months ago
Experimental Evaluation of Code Properties for WCET Analysis
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
Antoine Colin, Stefan M. Petters