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» Equations on Timed Languages
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ISQED
2005
IEEE
98views Hardware» more  ISQED 2005»
15 years 11 months ago
A More Effective CEFF
Precise chip-level timing requires careful modeling of the interaction between logic drivers and interconnect. Existing static-timing analysis methodologies generate models for dr...
Sani R. Nassif, Zhuo Li
IPPS
2000
IEEE
15 years 10 months ago
Repartitioning Unstructured Adaptive Meshes
We present a new parallel repartitioning algorithm for adaptive finite-element meshes that significantly reduces the amount of data that needs to move between processors in orde...
José G. Castaños, John E. Savage
ICRA
1995
IEEE
117views Robotics» more  ICRA 1995»
15 years 9 months ago
Control for an Autonomous Bicycle
The control of nonholonomic and underactuated systems with symmetry is illustrated by the problem of controlling a bicycle. We derive a controller which, using steering and rear-w...
Neil H. Getz, Jerrold E. Marsden
CASES
2005
ACM
15 years 7 months ago
An Esterel processor with full preemption support and its worst case reaction time analysis
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
Xin Li, Jan Lukoschus, Marian Boldt, Michael Harde...
CC
2010
Springer
179views System Software» more  CC 2010»
16 years 10 days ago
Validating Register Allocation and Spilling
Abstract. Following the translation validation approach to highassurance compilation, we describe a new algorithm for validating a posteriori the results of a run of register alloc...
Silvain Rideau, Xavier Leroy