501 search results - page 81 / 101 » Evaluating CMPs and Their Memory Architecture |
ACSAC
2006
IEEE
15 years 5 months ago
2006
IEEE
Address space randomization is an emerging and promising method for stopping a broad range of memory corruption attacks. By randomly shifting critical memory regions at process in...
TPDS
2002
14 years 11 months ago
2002
This paper presents a new distributed disk-array architecture for achieving high I/O performance in scalable cluster computing. In a serverless cluster of computers, all distribute...
130
click to vote
TVLSI
2010
14 years 6 months ago
2010
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
128
click to vote
FPGA
2010
ACM
14 years 12 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
TC
2008
14 years 11 months ago
2008
This paper examines the hardware implementation trade-offs when evaluating functions via piecewise polynomial approximations and interpolations for precisions of up to 24 bits. In ...