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» Experimental Study of Compiler Techniques for NUMA Machines
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DATE
2007
IEEE
72views Hardware» more  DATE 2007»
15 years 6 months ago
The impact of loop unrolling on controller delay in high level synthesis
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in High Level Synthesis (HLS) unrolling can affect the contr...
Srikanth Kurra, Neeraj Kumar Singh, Preeti Ranjan ...
ISCA
1999
IEEE
87views Hardware» more  ISCA 1999»
15 years 4 months ago
Memory Forwarding: Enabling Aggressive Layout Optimizations by Guaranteeing the Safety of Data Relocation
By optimizing data layout at run-time, we can potentially enhance the performance of caches by actively creating spatial locality, facilitating prefetching, and avoiding cache con...
Chi-Keung Luk, Todd C. Mowry
ENTCS
2002
181views more  ENTCS 2002»
14 years 11 months ago
Alias verification for Fortran code optimization
Abstract: Alias analysis for Fortran is less complicated than for programming languages with pointers but many real Fortran programs violate the standard: a formal parameter or a c...
Thi Viet Nga Nguyen, François Irigoin
IDEAL
2003
Springer
15 years 4 months ago
Detecting Distributed Denial of Service (DDoS) Attacks through Inductive Learning
As the complexity of Internet is scaled up, it is likely for the Internet resources to be exposed to Distributed Denial of Service (DDoS) flooding attacks on TCP-based Web servers....
Sanguk Noh, Cheolho Lee, Kyunghee Choi, Gihyun Jun...
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
15 years 5 months ago
Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation
Given the growth in application-specific processors, there is a strong need for a retargetable modeling framework that is capable of accurately capturing complex processor behavi...
Wei Qin, Sharad Malik