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SLIP
2009
ACM
15 years 6 months ago
Integrated interlayer via planning and pin assignment for 3D ICs
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...
Xu He, Sheqin Dong, Xianlong Hong, Satoshi Goto
IEEESCC
2007
IEEE
15 years 6 months ago
Development of NeuronBank: A Federation of Customizable Knowledge Bases of Neuronal Circuitry
Knowledge of neuronal circuitry is foundational to the neurosciences, but no tools have been developed for cataloguing this knowledge. Part of the problem is that the concepts use...
Robert J. Calin-Jageman, Akshaye Dhawan, Hong Yang...
ISQED
2007
IEEE
151views Hardware» more  ISQED 2007»
15 years 6 months ago
Gate Level Statistical Simulation Based on Parameterized Models for Process and Signal Variations
We propose gate level statistical simulation to bridge the gap between the most accurate Monte Carlo SPICE simulation and the most efficient circuit level statistical static timi...
Bao Liu
DATE
2006
IEEE
96views Hardware» more  DATE 2006»
15 years 5 months ago
On the relation between simulation-based and SAT-based diagnosis
The problem of diagnosis – or locating the source of an error or fault – occurs in several areas of Computer Aided Design, such as dynamic verification, property checking, eq...
Görschwin Fey, Sean Safarpour, Andreas G. Ven...
ISCAS
2006
IEEE
88views Hardware» more  ISCAS 2006»
15 years 5 months ago
SiP integration of intelligent, adaptive, self-sustaining power management solutions for portable applications
Abstract—Power management is an essential component of any electrical system, and nowadays a limiting factor in the miniaturization of portable electronic devices. Not only are t...
E. O. Torres, Min Chen, H. Pooya Forghani-zadeh, V...