1563 search results - page 284 / 313 » Flexible instruction processors |
ISLPED
2005
ACM
15 years 5 months ago
2005
ACM
Modern processors can issue and execute multiple instructions per cycle, often performing multiple memory operations simultaneously. To reduce stalls due to resource conflicts, m...
118
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LCTRTS
2005
Springer
15 years 5 months ago
2005
Springer
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
CGO
2010
IEEE
15 years 5 months ago
2010
IEEE
Feedback-directed optimization (FDO) is effective in improving application runtime performance, but has not been widely adopted due to the tedious dual-compilation model, the dif...
131
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ICS
1995
Tsinghua U.
15 years 3 months ago
1995
Tsinghua U.
Current data cache organizations fail to deliver high performance in scalar processors for many vector applications. There are two main reasons for this loss of performance: the u...
CASES
2008
ACM
15 years 1 months ago
2008
ACM
While technology advances have made MPSoCs a standard architecture for embedded systems, their applicability is increasingly being challenged by dramatic increases in the amount o...