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VTS
2000
IEEE
84views Hardware» more  VTS 2000»
15 years 4 months ago
ESIM: A Multimodel Design Error and Fault Simulator for Logic Circuits
ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of sim...
Hussain Al-Asaad, John P. Hayes
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 3 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
KI
2008
Springer
14 years 11 months ago
Shallow Models for Non-iterative Modal Logics
Abstract. Modal logics see a wide variety of applications in artificial intelligence, e.g. in reasoning about knowledge, belief, uncertainty, agency, defaults, and relevance. From ...
Lutz Schröder, Dirk Pattinson
TLCA
2007
Springer
15 years 6 months ago
Higher-Order Logic Programming Languages with Constraints: A Semantics
A Kripke Semantics is defined for a higher-order logic programming language with constraints, based on Church’s Theory of Types and a generic constraint formalism. Our syntactic...
James Lipton, Susana Nieva
IJCAI
2001
15 years 1 months ago
A Framework for Declarative Update Specifications in Logic Programs
Recently, several approaches for updating knowledge bases represented as logic programs have been proposed. In this paper, we present a generic framework for declarative specifica...
Thomas Eiter, Michael Fink, Giuliana Sabbatini, Ha...