115 search results - page 13 / 23 » Hardware synthesis from protocol specifications in LOTOS |
ICECCS
2000
IEEE
15 years 4 months ago
2000
IEEE
Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried ou...
ICCAD
1994
IEEE
15 years 3 months ago
1994
IEEE
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
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ICCAD
1999
IEEE
15 years 4 months ago
1999
IEEE
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
This paper describes a design space exploration experiment for a real application from the embedded networking domain - the physical layer of a wireless protocol. The application ...
DATE
1999
IEEE
15 years 4 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...