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» Heterogeneous behavioral hierarchy for system level designs
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IPPS
2002
IEEE
15 years 4 months ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
DAC
1999
ACM
15 years 4 months ago
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
Alex Doboli, Adrián Núñez-Ald...
ECOOPW
1999
Springer
15 years 4 months ago
An Aspect-Oriented Design Framework for Concurrent Systems
Abstract. In Aspect-Oriented Programming we decompose a problem into a number of functional components as well as a number of aspects and then we compose these components and aspec...
Constantinos Constantinides, Atef Bader, Tzilla El...
ITC
2003
IEEE
113views Hardware» more  ITC 2003»
15 years 5 months ago
Fault Injection for Verifying Testability at the VHDL Level
This paper presents a technique to improve verification at the VHDL level of digital circuits by means of a specially designed fault injection block. The injection technique allow...
S. R. Seward, Parag K. Lala
93
Voted
ICCD
2007
IEEE
133views Hardware» more  ICCD 2007»
15 years 8 months ago
System level power estimation methodology with H.264 decoder prediction IP case study
This paper presents a methodology to generate a hierarchy of power models for power estimation of custom hardware IP blocks, enabling a trade-off between power estimation accuracy...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...