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80
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MICRO
2008
IEEE
149views Hardware» more  MICRO 2008»
15 years 5 months ago
Prefetch-Aware DRAM Controllers
Existing DRAM controllers employ rigid, non-adaptive scheduling and buffer management policies when servicing prefetch requests. Some controllers treat prefetch requests the same ...
Chang Joo Lee, Onur Mutlu, Veynu Narasiman, Yale N...
CODES
2007
IEEE
15 years 5 months ago
Three-dimensional multiprocessor system-on-chip thermal optimization
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
Chong Sun, Li Shang, Robert P. Dick
ICC
2007
IEEE
121views Communications» more  ICC 2007»
15 years 5 months ago
A QoS Architecture for IDMA-Based Multi-Service Wireless Networks
— The recent investigations on interleave-division multiple-access (IDMA) have demonstrated its advantage in supporting high-data-rate and multi-rate services over wireless fadin...
Qian Huang, Sammy Chan, King-Tim Ko, Li Ping, Peng...
IEEEPACT
2007
IEEE
15 years 5 months ago
Performance Portable Optimizations for Loops Containing Communication Operations
Effective use of communication networks is critical to the performance and scalability of parallel applications. Partitioned Global Address Space languages like UPC bring the pro...
Costin Iancu, Wei Chen, Katherine A. Yelick
87
Voted
INFOCOM
2007
IEEE
15 years 5 months ago
RMAC: A Routing-Enhanced Duty-Cycle MAC Protocol for Wireless Sensor Networks
—Duty-cycle MAC protocols have been proposed to meet the demanding energy requirements of wireless sensor networks. Although existing duty-cycle MAC protocols such as S-MAC are p...
Shu Du, Amit Kumar Saha, David B. Johnson