Sciweavers

2032 search results - page 257 / 407
» Improving Java performance using hardware translation
Sort
View
ISCA
2006
IEEE
169views Hardware» more  ISCA 2006»
16 years 1 days ago
Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
Chuanjun Zhang
IEEEPACT
2007
IEEE
16 years 10 days ago
Fast Track: Supporting Unsafe Optimizations with Software Speculation
The use of multi-core, multi-processor machines is opening new opportunities for software speculation, where program code is speculatively executed to improve performance at the a...
Kirk Kelsey, Chengliang Zhang, Chen Ding
JPDC
2006
90views more  JPDC 2006»
15 years 6 months ago
Running OpenMP applications efficiently on an everything-shared SDSM
Traditional software distributed shared memory (SDSM) systems modify the semantics of a real hardware shared memory system by relaxing the coherence semantic and by limiting the m...
Juan José Costa, Toni Cortes, Xavier Martor...
COOPIS
2004
IEEE
15 years 9 months ago
Evaluation of a Group Communication Middleware for Clustered J2EE Application Servers
Abstract. Clusters have become the de facto platform to scale J2EE application servers. Each tier of the server uses group communication to maintain consistency between replicated ...
Takoua Abdellatif, Emmanuel Cecchet, Renaud Lachai...
OSDI
2008
ACM
16 years 6 months ago
Corey: An Operating System for Many Cores
Multiprocessor application performance can be limited by the operating system when the application uses the operating system frequently and the operating system services use data ...
Aleksey Pesterev, Haibo Chen, Lex Stein, M. Frans ...