1001 search results - page 24 / 201 » Improving memory hierarchy performance for irregular applica... |
104
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HPCC
2009
Springer
15 years 4 months ago
2009
Springer
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
EUROPAR
2000
Springer
15 years 3 months ago
2000
Springer
With the increasing processing power, the latency of the memory hierarchy becomes the stumbling block of many modern computer architectures. In order to speed-up the calculations, ...
105
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ARCS
2009
Springer
15 years 6 months ago
2009
Springer
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
133
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IEEEPACT
2009
IEEE
14 years 9 months ago
2009
IEEE
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
IEEEPACT
2009
IEEE
15 years 6 months ago
2009
IEEE
—Bulk memory copying and initialization is one of the most ubiquitous operations performed in current computer systems by both user applications and Operating Systems. While many...