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» Mapping Applications to a Coarse Grain Reconfigurable System
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DATE
1999
IEEE
194views Hardware» more  DATE 1999»
15 years 4 months ago
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
Bharat P. Dav
FPL
2005
Springer
140views Hardware» more  FPL 2005»
15 years 5 months ago
A Low-Energy FPGA: Architecture Design and Software-Supported Design Flow
The aim of the PhD thesis is the development of systematic methodologies both for hardware and software level for designing low-energy and performance efficient reconfigurable sys...
K. Siozios, Dimitrios Soudris, Adonios Thanailakis
ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
15 years 3 months ago
Power-aware mapping for reconfigurable NoC architectures
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
Mehdi Modarressi, Hamid Sarbazi-Azad
FPL
2000
Springer
93views Hardware» more  FPL 2000»
15 years 3 months ago
Reconfigurable Computing between Classifications and Metrics - The Approach of Space/Time-Scheduling
Abstract. Reconfigurable computing receives its merits from scheduling timebased into space-based execution. This paper reviews some common parameters and introduces an additional ...
Christian Siemers
IPPS
1997
IEEE
15 years 3 months ago
Optimizing Parallel Bitonic Sort
Sorting is an important component of many applications, and parallel sorting algorithms have been studied extensively in the last three decades. One of the earliest parallel sorti...
Mihai F. Ionescu