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» Mapping Applications to a Coarse Grain Reconfigurable System
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FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
14 years 3 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
PC
1998
123views Management» more  PC 1998»
14 years 11 months ago
Designing communication strategies for heterogeneous parallel systems
This paper investigates communication strategies for interconnecting heterogeneous parallel systems. As the speed of processors and parallel systems keep on increasing over the ye...
Ravi Prakash, Dhabaleswar K. Panda
BTW
2007
Springer
166views Database» more  BTW 2007»
15 years 5 months ago
Hierarchy-driven Visual Exploration of Multidimensional Data Cubes
: Analysts interact with OLAP data in a predominantly “drill-down” fashion, i.e. gradually descending from a coarsely grained overview towards the desired level of detail. Anal...
Svetlana Mansmann, Florian Mansmann, Marc H. Schol...
DAC
2003
ACM
16 years 20 days ago
Data communication estimation and reduction for reconfigurable systems
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
Adam Kaplan, Philip Brisk, Ryan Kastner
IJES
2008
83views more  IJES 2008»
14 years 11 months ago
Evaluating memory architectures for media applications on Coarse-grained Reconfigurable Architectures
Reconfigurable ALU Array (RAA) architectures--representing a popular class of Coarse-grained Reconfigurable Architectures--are gaining in popularity especially for media applicati...
Jong-eun Lee, Kiyoung Choi, Nikil Dutt