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» Mechanisms for store-wait-free multiprocessors
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FPL
2007
Springer
146views Hardware» more  FPL 2007»
15 years 6 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
HPCA
2008
IEEE
16 years 4 days ago
Single-level integrity and confidentiality protection for distributed shared memory multiprocessors
Multiprocessor computer systems are currently widely used in commercial settings to run critical applications. These applications often operate on sensitive data such as customer ...
Brian Rogers, Chenyu Yan, Siddhartha Chhabra, Milo...
SAMOS
2007
Springer
15 years 5 months ago
An Interrupt Controller for FPGA-based Multiprocessors
— Interrupt-based programming is widely used for interfacing a processor with peripherals and allowing software threads to interact. Many hardware/software architectures have bee...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...
SOSP
2009
ACM
15 years 8 months ago
PRES: probabilistic replay with execution sketching on multiprocessors
Bug reproduction is critically important for diagnosing a production-run failure. Unfortunately, reproducing a concurrency bug on multi-processors (e.g., multi-core) is challengin...
Soyeon Park, Yuanyuan Zhou, Weiwei Xiong, Zuoning ...
MICRO
2008
IEEE
148views Hardware» more  MICRO 2008»
15 years 6 months ago
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach
—Efficient sharing of system resources is critical to obtaining high utilization and enforcing system-level performance objectives on chip multiprocessors (CMPs). Although sever...
Ramazan Bitirgen, Engin Ipek, José F. Mart&...