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CGO
2008
IEEE
15 years 6 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
16 years 4 days ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...
INFOCOM
2012
IEEE
13 years 2 months ago
A theory of cloud bandwidth pricing for video-on-demand providers
—Current-generation cloud computing is offered with usage-based pricing, with no bandwidth capacity guarantees, which is however unappealing to bandwidth-intensive applications s...
Di Niu, Chen Feng, Baochun Li
ICIP
1997
IEEE
16 years 1 months ago
A Multi-Threshold Wavelet Coder ( MTWC ) For High Fidelity Image Compression
An embedded wavelet coder algorithm which adopts different threshold values in different subbands is proposed in this work. The new image coder, called the multi-threshold wavelet...
H.-J. Wang, C.-C. Kuo
ICMCS
2008
IEEE
336views Multimedia» more  ICMCS 2008»
15 years 6 months ago
SIMD optimization of the H.264/SVC decoder with efficient data structure
H.264/scalable video coding (SVC) is a new compression technique that can adapt to various network environments and applications. However, despite its outstanding performance, H.2...
Joohyun Lee, Gwanggil Jeon, Sangjun Park, Taeyoung...