6608 search results - page 274 / 1322 » On the Completeness of Model Checking |
149
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ENTCS
2007
15 years 6 months ago
2007
We describe techniques for diagnosing errors in formal equivalence checking of RTL and transistor level models of high performance microprocessors at Freescale Semiconductor Inc. ...
142
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GLVLSI
2003
IEEE
15 years 11 months ago
2003
IEEE
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...
180
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ICSE
1999
IEEE-ACM
15 years 10 months ago
1999
IEEE-ACM
In this paper we show how the FLAVERS data flow analysis technique, originally formulated for programs with the rendezvous model of concurrency, can be applied to concurrent Java...
156
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FMCAD
2009
Springer
15 years 10 months ago
2009
Springer
This paper discusses a methodology used on an industrial hardware development project to validate various cache-coherence protocol components. The idea is to use a high level model...
173
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APLAS
2005
ACM
15 years 11 months ago
2005
ACM
act Interpretation Perspective on Linear vs. Branching Time Francesco Ranzato and Francesco Tapparo Dipartimento di Matematica Pura ed Applicata, Universit`a di Padova, Italy It is...