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NOCS
2009
IEEE
16 years 22 days ago
Scalability of network-on-chip communication architecture for 3-D meshes
Design Constraints imposed by global interconnect delays as well as limitations in integration of disparate technologies make 3-D chip stacks an enticing technology solution for m...
Awet Yemane Weldezion, Matt Grange, Dinesh Pamunuw...
CISS
2008
IEEE
16 years 14 days ago
Threshold structure of channel aware distributed scheduling in ad-hoc networks: An optimal stopping view
— As evidenced by measurement data, channel fading and co-channel interference occur on the same time scales, and it is therefore difficult to determine if packet losses are due...
Junshan Zhang
GLOBECOM
2006
IEEE
16 years 1 days ago
Optimal Routing in the Worst-Case-Error Metric
— This paper considers the problem of finding the path with minimum (zero) worst possible number of errors in a network with V nodes where (1) some nodes are capable of correcti...
Edwin Soedarmadji
FPGA
2006
ACM
125views FPGA» more  FPGA 2006»
15 years 9 months ago
Armada: timing-driven pipeline-aware routing for FPGAs
While previous research has shown that FPGAs can efficiently implement many types of computations, their flexibility inherently limits their clock rate. Several research groups ha...
Kenneth Eguro, Scott Hauck
GLOBECOM
2009
IEEE
15 years 3 months ago
Cooperative Communications with Relay Selection for QoS Provisioning in Wireless Sensor Networks
Abstract--Cooperative communications have been demonstrated to be effective in combating the multiple fading effects in wireless networks, and improving the network performance in ...
Xuedong Liang, Ilangko Balasingham, Victor C. M. L...