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ANCS
2007
ACM
15 years 10 months ago
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture
Network-on-Chip (NoC) architectures provide a scalable solution to the wire delay constraints in deep submicron VLSI designs. Recent research into the optimization of NoC architec...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
IWQOS
2005
Springer
15 years 11 months ago
Designing a Predictable Internet Backbone with Valiant Load-Balancing
Abstract. Network operators would like their network to support current and future traffic matrices, even when links and routers fail. Not surprisingly, no backbone network can do ...
Rui Zhang-Shen, Nick McKeown
VTC
2008
IEEE
119views Communications» more  VTC 2008»
16 years 12 days ago
On the Design of a Quality-Of-Service Driven Routing Protocol for Wireless Cooperative Networks
—In this paper, a quality-of-service driven routing protocol is proposed for wireless cooperative networks. The key contribution of the proposed protocol is to bring the performa...
Zhengguo Sheng, Zhiguo Ding, Kin K. Leung
DATE
2010
IEEE
146views Hardware» more  DATE 2010»
15 years 11 months ago
Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
Rudy Beraha, Isask'har Walter, Israel Cidon, Avino...
SPAA
2003
ACM
15 years 11 months ago
Throughput-centric routing algorithm design
The increasing application space of interconnection networks now encompasses several applications, such as packet routing and I/O interconnect, where the throughput of a routing a...
Brian Towles, William J. Dally, Stephen P. Boyd