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IPPS
2009
IEEE
15 years 6 months ago
Using hardware transactional memory for data race detection
Abstract—Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to degrees of hardware concurrency hitherto unavailable...
Shantanu Gupta, Florin Sultan, Srihari Cadambi, Fr...
IPPS
2009
IEEE
15 years 6 months ago
Compact graph representations and parallel connectivity algorithms for massive dynamic network analysis
Graph-theoretic abstractions are extensively used to analyze massive data sets. Temporal data streams from socioeconomic interactions, social networking web sites, communication t...
Kamesh Madduri, David A. Bader
MICRO
2009
IEEE
207views Hardware» more  MICRO 2009»
15 years 6 months ago
Extending the effectiveness of 3D-stacked DRAM caches with an adaptive multi-queue policy
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
Gabriel H. Loh
GCB
2009
Springer
180views Biometrics» more  GCB 2009»
15 years 6 months ago
2D Projections of RNA Folding Landscapes
Abstract: The analysis of RNA folding landscapes yields insights into the kinetic folding behavior not available from classical structure prediction methods. This is especially imp...
Ronny Lorenz, Christoph Flamm, Ivo L. Hofacker
CLUSTER
2008
IEEE
15 years 6 months ago
Are nonblocking networks really needed for high-end-computing workloads?
—High-speed interconnects are frequently used to provide scalable communication on increasingly large high-end computing systems. Often, these networks are nonblocking, where the...
Narayan Desai, Pavan Balaji, P. Sadayappan, Mohamm...