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FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
15 years 2 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
GLOBECOM
2008
IEEE
15 years 5 months ago
Joint Channel and Mismatch Correction for OFDM Reception with Time-interleaved ADCs: Towards Mostly Digital MultiGigabit Transce
— Time-interleaved (TI) analog-to-digital converters (ADCs) are a promising architecture for realizing the highspeed ADCs required to implement “mostly digital” receivers for...
P. Sandeep, Upamanyu Madhow, Munkyo Seo, Mark J. W...
PRL
2010
181views more  PRL 2010»
14 years 9 months ago
Gait recognition without subject cooperation
The strength of gait, compared to other biometrics, is that it does not require cooperative subjects. Previoius gait recognition approaches were evaluated using a gallery set cons...
Khalid Bashir, Tao Xiang, Shaogang Gong
AIPS
2004
15 years 18 days ago
An Empirical Analysis of Some Heuristic Features for Local Search in LPG
LPG is a planner that performed very well in the last International planning competition (2002). The system is based on a stochastic local search procedure, and it incorporates se...
Alfonso Gerevini, Alessandro Saetti, Ivan Serina
DAC
2012
ACM
13 years 1 months ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra