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GECCO
2003
Springer
103views Optimization» more  GECCO 2003»
15 years 5 months ago
Evaluation of Parameter Sensitivity for Portable Embedded Systems through Evolutionary Techniques
Power consumption and portability issues are becoming increasingly significant in embedded system architectures. Therefore, it is important that chip architects and integrated circ...
James Northern III, Michael A. Shanblatt
CDES
2008
90views Hardware» more  CDES 2008»
15 years 1 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
FCCM
2009
IEEE
189views VLSI» more  FCCM 2009»
15 years 6 months ago
Application Specific Customization and Scalability of Soft Multiprocessors
Although soft microprocessors are widely used in FPGAs, limited work has been performed regarding how to automatically and efficiently generate soft multiprocessors. In this paper...
Deepak Unnikrishnan, Jia Zhao, Russell Tessier
FCCM
2003
IEEE
135views VLSI» more  FCCM 2003»
15 years 5 months ago
Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable
Hybrid architectures, which are composed of a conventional processor closely coupled with reconfigurable logic, seem to combine the advantages of both types of hardware. They pres...
Benjamin A. Levine, Herman Schmit
CF
2004
ACM
15 years 5 months ago
Integrated temporal and spatial scheduling for extended operand clustered VLIW processors
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...
Rahul Nagpal, Y. N. Srikant