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MICRO
2003
IEEE
106views Hardware» more  MICRO 2003»
15 years 5 months ago
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, P...
SBCCI
2003
ACM
160views VLSI» more  SBCCI 2003»
15 years 5 months ago
Novel Design Methodology for High-Performance XOR-XNOR Circuit Design
As we scale down to deep submicron (DSM) technology, noise is becoming a metric of equal importance as power, speed, and area. Smaller feature sizes, low voltage, and high frequen...
Sumeer Goel, Mohamed A. Elgamel, Magdy A. Bayoumi
ISCAS
2002
IEEE
111views Hardware» more  ISCAS 2002»
15 years 4 months ago
CASCADE - configurable and scalable DSP environment
As the complexity of embedded systems grows rapidly, it is common to accelerate critical tasks with hardware. Designers usually use off-the-shelf components or licensed IP cores t...
Tay-Jyi Lin, Chein-Wei Jen
SC
2000
ACM
15 years 4 months ago
Performance Modeling and Tuning of an Unstructured Mesh CFD Application
This paper describes performance tuning experiences with a three-dimensional unstructured grid Euler flow code from NASA, which we have reimplemented in the PETSc framework and p...
William Gropp, Dinesh K. Kaushik, David E. Keyes, ...
INFOCOM
1999
IEEE
15 years 4 months ago
Performance Characteristics of Mirror Servers on the Internet
Abstract--As a growing number of web sites introduce mirrors to increase throughput, the challenge for clients becomes determining which mirror will offer the best performance when...
Andy Myers, Peter A. Dinda, Hui Zhang