This paper discusses issues in modeling C4I and cognitive processes in next generation simulations and applications to Force XXI command and control. We propose a modification to ...
Martin S. Kleiner, Scott A. Carey, Joseph E. Beach
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
In a traditional Network-on-Chip (NoC), latency and power dissipation increase with system size due to its inherent multi-hop communications. The performance of NoC communication ...
Sujay Deb, Amlan Ganguly, Kevin Chang, Partha Prat...
Many scenarios of beyond 3G mobile communications describe the integration of various access technologies into one system. Being always best connected under certain optimization c...
In this paper, the problem of automatically mapping large-grain dataflow programs onto heterogeneous hardware/softwarearchitectures is treated. Starting with a given hardware/soft...