4312 search results - page 62 / 863 » Semi-User-Level Communication Architecture |
155
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DAC
2001
ACM
16 years 6 months ago
2001
ACM
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
176
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DAC
2005
ACM
16 years 6 months ago
2005
ACM
In this paper, we describe FLEXBUS, a flexible, high-performance onchip communication architecture featuring a dynamically configurable topology. FLEXBUS is designed to detect run...
167
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DATE
2006
IEEE
15 years 11 months ago
2006
IEEE
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex multi-processor system-on-chip (MPSoC) designs. The memory...
142
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SAINT
2009
IEEE
16 years 7 days ago
2009
IEEE
In this paper, we present a social network based network communication architecture, Davis Social Links (DSL). DSL uses the trust and relationships inherent to human social networ...
132
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AHS
2007
IEEE
15 years 12 months ago
2007
IEEE
This paper proposes a hybrid communication medium for on-chip communication targeting adaptive SoC architectures. Unlike the work carried out in literature, where the term “hybr...