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CODES
2007
IEEE
16 years 11 days ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
CODES
2007
IEEE
16 years 11 days ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas
CODES
2007
IEEE
16 years 11 days ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...
CODES
2007
IEEE
16 years 11 days ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
DATE
2007
IEEE
104views Hardware» more  DATE 2007»
16 years 11 days ago
Dynamic reconfiguration in sensor networks with regenerative energy sources
In highly power constrained sensor networks, harvesting energy from the environment makes prolonged or even perpetual execution feasible. In such energy harvesting systems, energy...
Ani Nahapetian, Paolo Lombardo, Andrea Acquaviva, ...
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