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» System level design, a VHDL based approach
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PADS
1999
ACM
15 years 4 months ago
Shock Resistant Time Warp
In an attempt to cope with time-varying workload, traditional adaptive Time Warp protocols are designed to react in response to performance changes by altering control parameter c...
Alois Ferscha, James Johnson
ISCA
1996
IEEE
130views Hardware» more  ISCA 1996»
15 years 3 months ago
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
Mark Horowitz, Margaret Martonosi, Todd C. Mowry, ...
DEBS
2008
ACM
15 years 1 months ago
Event-based constraints for sensornet programming
We propose a sensornet programming model based on declarative spatio-temporal constraints on events only, not sensors. Where previous approaches conflate events and sensors becaus...
Jie Mao, John Jannotti, Mert Akdere, Ugur Ç...
BMCBI
2008
120views more  BMCBI 2008»
14 years 11 months ago
DBMLoc: a Database of proteins with multiple subcellular localizations
Background: Subcellular localization information is one of the key features to protein function research. Locating to a specific subcellular compartment is essential for a protein...
Song Zhang, Xuefeng Xia, Jincheng Shen, Yun Zhou, ...
ACMACE
2006
ACM
15 years 5 months ago
Wireless home entertainment center: reducing last hop delays for real-time applications
Future digital entertainment services available to home users will share several characteristics: i) they will be deployed and delivered through the Internet, ii) a single media c...
Claudio E. Palazzi, Giovanni Pau, Marco Roccetti, ...
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