Sciweavers

5744 search results - page 14 / 1149
» System level design, a VHDL based approach
Sort
View
RSP
1998
IEEE
110views Control Systems» more  RSP 1998»
15 years 4 months ago
Rapid Design of Discrete Orthonormal Wavelet Transforms
A rapid design methodology for orthonormal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture utilising time-interleaved co...
Shahid Masud, John V. McCanny
HICSS
2003
IEEE
138views Biometrics» more  HICSS 2003»
15 years 5 months ago
Towards Verifying Parametrised Hardware Libraries with Relative Placement Information
Abstract— This paper presents a framework for verifying compilation tools for parametrised hardware libraries with placement information. Such libraries are captured in Pebble, a...
Steve McKeever, Wayne Luk, Arran Derbyshire
ICCAD
2002
IEEE
80views Hardware» more  ICCAD 2002»
15 years 8 months ago
Minimizing power across multiple technology and design levels
Approaches to achieve low-power and high-speed VLSI's are described with the emphasis on techniques across multiple technology and design levels. To suppress the leakage curr...
Takayasu Sakurai
EUROMICRO
1999
IEEE
15 years 4 months ago
Design Space Exploration in System Level Synthesis under Memory Constraints
This paper addresses the problem of component selection, task assignment and task scheduling for distributed embedded computer systems. Such systems have a large number of constra...
Radoslaw Szymanek, Krzysztof Kuchcinski
87
Voted
DATE
1997
IEEE
95views Hardware» more  DATE 1997»
15 years 3 months ago
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications
A design methodology for the synthesis of digital circuits used in high throughput digital modems is presented. The methodology spans digital modem design from the link level to t...
Patrick Schaumont, Serge Vernalde, Luc Rijnders, M...