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» System level design, a VHDL based approach
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GECCO
2007
Springer
196views Optimization» more  GECCO 2007»
15 years 5 months ago
Pareto optimal search based refactoring at the design level
Refactoring aims to improve the quality of a software systems’ structure, which tends to degrade as the system evolves. While manually determining useful refactorings can be cha...
Mark Harman, Laurence Tratt

Publication
351views
16 years 12 months ago
Synthesizable High Level Hardware Descriptions
Modern hardware description languages support code-generation constructs like generate/endgenerate in Verilog. These constructs are intended to describe regular or parameterized ha...
Jennifer Gillenwater, Gregory Malecha, Cherif Sala...
EURODAC
1990
IEEE
102views VHDL» more  EURODAC 1990»
15 years 3 months ago
Tools and devices supporting the pseudo-exhaustive test
: In this paper logical cells and algorithms are presented supporting the design of pseudo-exhaustively testable circuits. The approach is based on real hardware segmentation, inst...
Sybille Hellebrand, Hans-Joachim Wunderlich
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
15 years 8 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...
ICRA
2000
IEEE
78views Robotics» more  ICRA 2000»
15 years 4 months ago
Hybrid System Design for Singularityless Task Level Robot Controllers
This paper presents a hybrid system approach in the design of a singularityless task level controller. To achieve a singularityless motion control in the neighborhood of singulari...
Jindong Tan, Ning Xi