207 search results - page 13 / 42 » Testing and Model-Checking Techniques for Diagnosis |
DELTA
2006
IEEE
15 years 5 months ago
2006
IEEE
— Design, Verification and Test of integrated circuits with millions of gates put strong requirements on design time, test volume, test application time, test speed and diagnost...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
— During volume testing, test application time, test data volume and high performance automatic test equipment (ATE) are the major cost factors. Embedded testing including builti...
129
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CSREAESA
2008
15 years 1 months ago
2008
A group testing-based BIST technique to identify faulty hard cores in FPGA devices is presented. The method provides for isolation of faults in embedded cores as demonstrated by ex...
DFT
1999
IEEE
15 years 4 months ago
1999
IEEE
Fault identification capabilities are becoming increasingly important in modern designs, not only in support of design debugging methodologies, but also for the purpose of process...
102
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TCAD
2002
14 years 11 months ago
2002
As IC densities are increasing, cluster-based FPGA architectures are becoming the architecture of choice for major FPGA manufacturers. A cluster-based architecture is one in which...