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» The Design, Implementation, and Evaluation of Jade
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CN
2007
93views more  CN 2007»
14 years 10 months ago
UDT: UDP-based data transfer for high-speed wide area networks
In this paper, we summarize our work on the UDT high performance data transport protocol in the past four years. UDT was designed to effectively utilize the rapidly emerging high-...
Yunhong Gu, Robert L. Grossman
FPL
2010
Springer
124views Hardware» more  FPL 2010»
14 years 8 months ago
Finding System-Level Information and Analyzing Its Correlation to FPGA Placement
One of the more popular placement algorithms for Field Programmable Gate Arrays (FPGAs) is called Simulated Annealing (SA). This algorithm tries to create a good quality placement ...
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
137
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FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
14 years 2 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
MOBISYS
2009
ACM
15 years 11 months ago
xShare: supporting impromptu sharing of mobile phones
Loaded with personal data, e.g. photos, contacts, and call history, mobile phones are truly personal devices. Yet it is often necessary or desirable to share our phones with other...
Yunxin Liu, Ahmad Rahmati, Yuanhe Huang, Hyukjae J...
OOPSLA
2009
Springer
15 years 5 months ago
A concurrent dynamic analysis framework for multicore hardware
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
Jungwoo Ha, Matthew Arnold, Stephen M. Blackburn, ...