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» The Design and Performance of a Conflict-Avoiding Cache
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DATE
2003
IEEE
127views Hardware» more  DATE 2003»
15 years 5 months ago
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
Amit Agarwal, Kaushik Roy, T. N. Vijaykumar
MOBIDE
2003
ACM
15 years 5 months ago
Consistency mechanisms for a distributed lookup service supporting mobile applications
This paper presents a general-purpose distributed lookup service, denoted Passive Distributed Indexing (PDI). PDI stores entries in form of (key, value) pairs in index caches loca...
Christoph Lindemann, Oliver P. Waldhorst
ISLPED
2006
ACM
109views Hardware» more  ISLPED 2006»
15 years 5 months ago
Power reduction of multiple disks using dynamic cache resizing and speed control
This paper presents an energy-conservation method for multiple disks and their cache memory. Our method periodically resizes the cache memory and controls the rotation speeds unde...
Le Cai, Yung-Hsiang Lu
TCAD
2008
88views more  TCAD 2008»
14 years 11 months ago
Self-Adaptive Data Caches for Soft-Error Reliability
Soft-error induced reliability problems have become a major challenge in designing new generation microprocessors. Due to the on-chip caches' dominant share in die area and tr...
Shuai Wang, Jie S. Hu, Sotirios G. Ziavras
CLUSTER
2006
IEEE
15 years 5 months ago
Designing High Performance and Scalable MPI Intra-node Communication Support for Clusters
As new processor and memory architectures advance, clusters start to be built from larger SMP systems, which makes MPI intra-node communication a critical issue in high performanc...
Lei Chai, Albert Hartono, Dhabaleswar K. Panda