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» The Design and Performance of a Conflict-Avoiding Cache
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GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
15 years 6 months ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...
WMPI
2004
ACM
15 years 5 months ago
Cache organizations for clustered microarchitectures
Clustered microarchitectures are an effective organization to deal with the problem of wire delays and complexity by partitioning some of the processor resources. The organization ...
José González, Fernando Latorre, Ant...
SC
2009
ACM
15 years 6 months ago
Enabling software management for multicore caches with a lightweight hardware support
The management of shared caches in multicore processors is a critical and challenging task. Many hardware and OS-based methods have been proposed. However, they may be hardly adop...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
INFOCOM
2006
IEEE
15 years 5 months ago
A Comparative Study of the DNS Design with DHT-Based Alternatives
— The current Domain Name System (DNS) follows a hierarchical tree structure. Several recent efforts proposed to re-implement DNS as a peer-to-peer network with a flat structure...
Vasileios Pappas, Daniel Massey, Andreas Terzis, L...
CN
2002
77views more  CN 2002»
14 years 11 months ago
Architecture of a Web server accelerator
We describe the design, implementation and performance of a high-performance Web server accelerator which runs on an embedded operating system and improves Web server performance ...
Junehwa Song, Arun Iyengar, Eric Levy-Abegnoli, Da...