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» The Design and Performance of a Conflict-Avoiding Cache
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ARCS
2006
Springer
15 years 3 months ago
Efficient System-on-Chip Energy Management with a Segmented Bloom Filter
As applications tend to grow more complex and use more memory, the demand for cache space increases. Thus embedded processors are inclined to use larger caches. Predicting a miss i...
Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien...
COMPUTER
2000
138views more  COMPUTER 2000»
14 years 11 months ago
Making Pointer-Based Data Structures Cache Conscious
Processor and memory technology trends portend a continual increase in the relative cost of accessing main memory. Machine designers have tried to mitigate the effect of this tren...
Trishul M. Chilimbi, Mark D. Hill, James R. Larus
VLDB
2002
ACM
141views Database» more  VLDB 2002»
14 years 11 months ago
A Multi-version Cache Replacement and Prefetching Policy for Hybrid Data Delivery Environments
This paper introduces MICP, a novel multiversion integrated cache replacement and prefetching algorithm designed for efficient cache and transaction management in hybrid data deli...
André Seifert, Marc H. Scholl
IEEEPACT
2009
IEEE
14 years 9 months ago
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...
TPDS
2008
89views more  TPDS 2008»
14 years 11 months ago
Power/Performance/Thermal Design-Space Exploration for Multicore Architectures
Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern app...
Matteo Monchiero, Ramon Canal, Antonio Gonzá...