In this paper we explore the tactical aspects needed for the creation of an intelligent computer-pool player. The research results in three modifications to our previous model. An ...
This paper proposes a novel architecture synthesis algorithm for single-loop single-bit ∆Σ modulators. We defined a generic modulator architecture and derived its noise and si...
Code space is a critical issue facing designers of software for embedded systems. Many traditional compiler optimizations are designed to reduce the execution time of compiled cod...
Keith D. Cooper, Philip J. Schielke, Devika Subram...
Dynamic class loading during program execution in the JavaTM Programming Language is an impediment for generating code that is as e cient as code generated using static wholeprogr...
Vugranam C. Sreedhar, Michael G. Burke, Jong-Deok ...
This paper proposes a framework for (signal) interconnect power optimization at the global routing stage. In a typical design flow, the primary objective of global routing is mini...