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ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
15 years 10 months ago
Repeater insertion in RLC lines for minimum propagation delay
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
Yehea I. Ismail, Eby G. Friedman
NDSS
1999
IEEE
15 years 10 months ago
PGRIP: PNNI Global Routing Infrastructure Protection
We describe a system for achieving PNNI (Private Network-Network Interface) Global Routing Infrastructure Protection (PGRIP). We give details of PGRIP's system-level design a...
Sabrina De Capitani di Vimercati, Patrick Lincoln,...
SCCC
1999
IEEE
15 years 10 months ago
Safe-Threads: A New Model for Object-Oriented Multi-Threaded Languages
Threads have been present in programming languages for some time now. However, they have a bad image among software developers because they lead to unreliable applications. Most o...
Luis Mateu, José M. Piquer
FM
1999
Springer
107views Formal Methods» more  FM 1999»
15 years 10 months ago
A Formalization of Software Architecture
Software architecture addresses the high level specification, design and analysis of software systems. Formal models can provide essential underpinning for architectural descripti...
John Herbert, Bruno Dutertre, Robert A. Riemenschn...
VLSID
1999
IEEE
104views VLSI» more  VLSID 1999»
15 years 10 months ago
Interconnect Optimization Strategies for High-Performance VLSI Designs
Interconnect tuning and repeater insertion are necessary to optimize interconnectdelay, signalperformanceandintegrity, andinterconnectmanufacturability and reliability. Repeater i...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto
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