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MICRO
2003
IEEE
147views Hardware» more  MICRO 2003»
15 years 5 months ago
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
Enric Gibert, F. Jesús Sánchez, Anto...
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
15 years 5 months ago
Performance analysis of greedy shapers in real-time systems
— Traffic shaping is a well-known technique in the area of networking and is proven to reduce global buffer requirements and end-to-end delays in networked systems. Due to these...
Ernesto Wandeler, Alexander Maxiaguine, Lothar Thi...
ASPDAC
2010
ACM
161views Hardware» more  ASPDAC 2010»
14 years 9 months ago
A dual-MST approach for clock network synthesis
Abstract--In nanometer-scale VLSI physical design, clock network becomes a major concern on determining the total performance of digital circuit. Clock skew and PVT (Process, Volta...
Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham, Evangel...
GLOBECOM
2007
IEEE
15 years 6 months ago
Modeling the 802.11e Enhanced Distributed Channel Access Function
—The Enhanced Distributed Channel Access (EDCA) function of IEEE 802.11e standard defines multiple Access Categories (AC) with AC-specific Contention Window (CW) sizes, Arbitra...
Inanc Inan, Feyza Keceli, Ender Ayanoglu
TCOM
2010
83views more  TCOM 2010»
14 years 10 months ago
Average power reduction for MSM optical signals via sparsity and uncertainty principle
Multiple subcarrier modulation is an appealing scheme for high-data rate optical communication. However a major drawback is its low average power efficiency. While subcarrier res...
Jovana Ilic, Thomas Strohmer