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» X-architecture placement based on effective wire models
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ISPD
2007
ACM
128views Hardware» more  ISPD 2007»
13 years 11 months ago
X-architecture placement based on effective wire models
In this paper, we derive the X-half-perimeter wirelength (XHPWL) model for X-architecture placement and explore the effects of three different wire models on X-architecture plac...
Tung-Chieh Chen, Yi-Lin Chuang, Yao-Wen Chang
ISQED
2007
IEEE
160views Hardware» more  ISQED 2007»
14 years 4 months ago
On-Chip Inductance in X Architecture Enabled Design
The inductance effects become significant for sub-100nm process designs due to increasing interconnect lengths, lower interconnect resistance values and fast signal transition tim...
Santosh Shah, Arani Sinha, Li Song, Narain D. Aror...
ICCAD
2001
IEEE
108views Hardware» more  ICCAD 2001»
14 years 7 months ago
Placement Driven Retiming with a Coupled Edge Timing Model
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
Ingmar Neumann, Wolfgang Kunz
ASPDAC
2008
ACM
126views Hardware» more  ASPDAC 2008»
14 years 21 hour ago
DPlace2.0: A stable and efficient analytical placement based on diffusion
Nowadays a placement problem often involves multi-million objects and excessive fixed blockages. We present a new global placement algorithm that scales well to the modern large-s...
Tao Luo, David Z. Pan
ICCAD
2008
IEEE
97views Hardware» more  ICCAD 2008»
14 years 7 months ago
Guiding global placement with wire density
—This paper presents an efficient technique for the estimation of the routed wirelength during global placement using the wire density of the net. The proposed method identifie...
Kalliopi Tsota, Cheng-Kok Koh, Venkataramanan Bala...