Modeling and Simulation of a Sigma-Delta Digital to Analog Converter Using VHDL-AMS

— Sigma-Delta digital to analog converters are less vulnerable to circuit imperfections than their A/D counterparts because they have their noise-shaping loop all in the digital domain. Still the analog part of the system (basically a low-pass filter) can degrade the overall performance, especially in the case of multi-bit converters. This paper presents a way of identifying and simulating the major noise and harmonics contributions of the system using VHDL-AMS. The resulting system-level model can be used to explore different architectures in the digital domain and to determine the specifications of the different building blocks. Keywords—D/A conversion, Sigma-Delta, VHDL-AMS

• Type: Conference
• Year: 2000
• Where: BMAS
• Authors: Martin Vogels, Bart De Smedt, Georges G. E. Gielen
• Keywords: A/D Counterparts, BMAS 2000, Digital Domain, Modelling And Simulation, Sigma-Delta Digital